memory
RSS memoryPCI Express and Advanced Switching: Evolutionary Path to Building Next Generation Interconnects
White Paper With processor and memory technologies pushing the performance limit, the bottleneck is clearly shifting towards the system interconnect. Any solution that addresses PCI's bus-based interconnect, which has serious scalability problems, must also... [11 Jul 2008]
Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth
White Paper A mini-graph is a dataflow graph that has an arbitrary internal size and shape but the interface of a singleton instruction: two register inputs, one register output, a maximum of one memory operation, and a maximum of one (terminal) control... [11 Jul 2008]
Scalable VPN Routing Via Relaying
White Paper As a result, router memory in the provider's network has become a key bottleneck in provisioning new customers. Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers... [11 Jul 2008]
High-Bandwidth Address Translation for Multiple-Issue Processors
White Paper As bandwidth demands continue to increase, multi-ported designs will soon impact memory access latency. In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level... [11 Jul 2008]
Removing Architectural Bottlenecks to the Scalability of Speculative Parallelization
White Paper The solutions that proposed in this are: low-complexity commit in constant time to eliminate the task commit bottleneck, a memory-based overflow area to eliminate stall due to speculative buffer overflow, and exploiting high-level access patterns... [11 Jul 2008]
Enterprise-Quality Security Devices for the End User
White Paper Both Innominate products use the Intel IXP425 network processor, the Intel 28F128J3 Strata Flash memory, and the Intel LXT973 10/100Mbps Ethernet PHY transceiver. With everything and everyone connected to the Internet - virtually anywhere at... [11 Jul 2008]
Scalability, Fidelity, and Containment in the Potemkin Virtual Honeyfarm
White Paper A prototype honeyfarm system has built, called Potemkin that exploits virtual machines, aggressive memory sharing, and late binding of resources to achieve this goal. The rapid evolution of large-scale worms, viruses and bot-nets have made Internet... [11 Jul 2008]
Load Balancing With Memory
White Paper This paper show that similar performance gains occur by introducing memory. A standard load balancing model considers placing n balls into n bins by choosing d possible locations for each ball independently and uniformly at random and sequentially... [10 Jul 2008]
Bandwidth Reduction for Video Processing in Consumer Systems
White Paper The architecture of present video processing units in consumer systems is usually based on various forms of processor hardware, communicating with an o -chip SDRAM memory. Due to the fast increase of required computational power of consumer systems... [10 Jul 2008]
Optimizing Pattern Matching for Intrusion Detection
White Paper A memory efficient variant uses sparse matrix storage to reduce memory requirements and further improve performance on large pattern groups. This paper presents an optimized version of the Aho-Corasick algorithm. [10 Jul 2008]
A Comparison of Task Pools for Dynamic Load Balancing of Irregular Algorithms
White Paper This paper discusses the characteristics of task-based algorithms and describes the implementation of selected types of task pools for shared-memory multiprocessors. Results of these implementations measured on three different shared-memory systems... [10 Jul 2008]
Cache and Bandwidth Aware Matrix Multiplication on the GPU
White Paper An earlier method for multiplying matrices on the GPU suffered from problems of memory bandwidth. This paper examines more efficient algorithms that make the implementation of large matrix multiplication on upcoming GPU architectures more... [10 Jul 2008]
Load Balancing Parallel Explicit State Model Checking
White Paper This paper presents an empirical analysis of the GDE based load balancing algorithm on three different supercomputing architectures - distributed memory clusters, Networks Of Workstations (NOW) and shared memory machines. [10 Jul 2008]
Evaluation of Load Balancing Strategies
White Paper The distributed memory parallel processing technology encourages researchers to attack computationally intensive problems using inexpensive network of workstations. But unfortunately, distributed applications often face the problem of load... [10 Jul 2008]
A Parallel Iterative Linear System Solver With Dynamic Load Balancing
White Paper This paper describes the design and implementation of a parallel iterative linear system solver for distributed memory multicomputers and workstation clusters. It is capable of applying heterogeneous data distribution and dynamic load balancing... [10 Jul 2008]
