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Modeling of Jitter in Bang-Bang Clock and Data Recovery Circuits

White Paper Clock and Data Recovery (CDR) circuits incorporating bang-bang (binary) Phase Detectors (PDs) have recently found wide usage. In contrast to their linear counterparts, bang-bang PDs relax the speed and precision required... [22 Oct 2008]

A Multiple-Rotating-Clock-Phase Architecture for Digital Data Recovery Circuits Using Verilog-A

White Paper This paper presents an oversampling Data Recovery (DR) architecture using Verilog-A that employs a novel Multiple-Rotating-Clock-Phase (MRCP) concept for its operation. The MRCP-DR architecture is a variant of the eye-tracking DR... [22 Oct 2008]

A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores Using Dynamic Hardware/Software Partitioning

White Paper Field Programmable Gate Arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Previously, this paper proposed warp processing, a technique capable of optimizing a software application by... [22 Oct 2008]

A 1O-Gb/s CMOS Clock and Data Recovery Circuit

White Paper Clock and Data Recovery (CDR) circuits operating in the 1O-Gb/s range have become attractive for the optical fiber backbone of the Internet. While CDR circuits operating at 10-Gbls and above have been... [22 Oct 2008]

Toward Quality EDA Tools and Tool Flows Through High-Performance Computing

White Paper As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New-generation EDA tools must work correctly... [22 Oct 2008]

Open-Loop Clock and Data Recovery Systems

White Paper CDR circuits typically use PLLs, but their complexity presents several design challenges : the input data stream is random and is usually in Non-Return-to-Zero (NRZ) data format, and little energy exists at the clock... [22 Oct 2008]

Designing Bang-Bang PLLs for Clock and Data Recovery in Serial Data Transmission Systems

White Paper Clock recovery using Phase-Locked Loops (PLL) with binary (bang-bang) or ternary-quantized phase detectors has become increasingly common starting with the advent of fully monolithic Clock and Data Recovery (CDR)... [07 Oct 2008]

MPLS VPNs: The Real Deal

White Paper While an IPsec VPN creates a circuit across the Internet, MPLS creates circuits across service providers' networks. Are MPLS circuits less private because they aren't encrypted? Most enterprises aren't... [01 Oct 2008]

Telecom 2.0: Mind over matter

White Paper Gone are the days when it was enough to simply focus on circuits and minutes, customers now need a far higher degree of interaction and look for suppliers who will talk business solutions with them. ntl:Telewest Business... [19 Sep 2008]

Medicalodges Expands Healthcare Network Capacity With Accelerators

White Paper Medicalodges had the option of going with a traditional network upgrade from 56 kbps circuits to 128 kbps or T1 speeds for several locations. Medicalodges' Wide Area Network (WAN) connects 23 skilled nursing facilities,... [19 Sep 2008]

Analyzing Switched Circuits to Design DC-DC and DC-AC Converters

White Paper The purpose of this paper is to present an alternative analysis of switched circuit to design Square Wave Generators (SWG). A SWG may be designed by using low-cost electronic components, which allows to the readers to understand how... [11 Sep 2008]

Feasibility of Flow-Based Optical Provisioning in GEANT

White Paper Historically, telephone calls were injected into circuits at the edge of the network, while data traffic was sent to an IP router towards a packet switched architecture. Traditionally the difference between telephone and... [11 Sep 2008]

Resource Sharing of High-Speed Optical Circuits for File Transfers

White Paper A number of efforts are underway to use optical networks to create high-speed end-to-end circuits. These circuits can be used for transfers of large files such as those generated by large-scale... [11 Sep 2008]

MPLS-Based Layer 2 Virtual Private Networks

White Paper While Virtual Private Networks (VPNs) based on Frame Relay or ATM circuits are common, the costs of maintaining separate networks for Internet traffic and VPNs and the administrative burden of provisioning VPNs have led... [11 Sep 2008]

Circuit Theory of Power Factor Correction in Switching Converters

White Paper This paper discusses the circuit theory aspects of power factor correction in switching converter circuits. Using the concept of zero-order converter circuits, sufficient conditions for a dc/dc converter... [11 Sep 2008]

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Analogue Electronics Engineer, Hull, Low Noise Amps, 38,000,

The Candidate; Will be an exceptional electronics engineer with the capabilities of designing complex analogue circuits, using Pspice, and will have ...

Development Engineer - Analogue Hardware

Development Engineer - Analogue Hardware The ideal candidate will have proven dedicated design experience of high bandwidth, low noise analogue ...

Firmware/Digital Design and Development Engineer

Firmware/Digital Design and Development Engineer Duties and Responsibilities: The duties of the incumbent include the design and development of ...

FIRMWARE / DIGITAL DESIGN / DEVELOPMENT ENGINEER

Firmware/Digital Design and Development Engineer :- Duties and Responsibilities: The duties of the incumbent include the design and development of ...

Harlow/IC Design Engineer/50K/Mixed Signal/Analogue

Harlow/IC Design Engineer/50K/Mixed Signal/Analogue The main activities involved in this job are; + To enhance their competitive position by ...


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