application performance interconnect
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Power-Aware Code Scheduling for Clusters of Active Disks
White Paper Each individual active disk (which includes an embedded processor, disk(s), caches, memory, and interconnect) can perform some application level processing; but, more importantly, the active disks can... [11 Aug 2008]
Throughput-Centric Routing Algorithm Design
White Paper The increasing application space of interconnection networks now encompasses several applications, such as packet routing and I/O interconnect, where the throughput of a routing algorithm, not just its... [11 Jul 2008]
PCI Express and Advanced Switching: Evolutionary Path to Building Next Generation Interconnects
White Paper With processor and memory technologies pushing the performance limit, the bottleneck is clearly shifting towards the system interconnect. Any solution that addresses PCI's bus-based... [11 Jul 2008]
InfiniBand Cluster Interconnect Performance on HP-UX 11iv2
White Paper The HP-UX InfiniBand cluster interconnect solution supports both point-to-point and switch configurations without any negative impact on the application performance. This paper presents... [03 Jul 2008]
Comparing Cluster Interconnects: Fluent CFD Application Over Ethernet and InfiniBand
White Paper This paper presents application performance measurements using Fluent, a popular Computational Fluid Dynamics (CFD) application, and three Cisco technology-based... [12 Jun 2008]
Comparing Cluster Interconnects: LS-DYNA Performance Benchmarks for Gigabit Ethernet and Cisco Double Data Rate InfiniBand
White Paper The ability of a high-performance cluster (HPC) to positively affect application performance is one of the most important factors to consider in selecting a switching fabric type and... [03 Apr 2008]
Exchange Server 2007 Performance Comparison of the Dell PowerEdge 2950 and HP Proliant DL385 G2 Servers
White Paper While the Dell PowerEdge 2950 and the HP Proliant DL385 G2 are both twosocket x86-based servers, they are based on different processor-to-memory interconnect technologies. This difference can result in very different... [20 Feb 2008]
TCP Servers: Offloading TCP Processing in Internet Servers - Design, Implementation, and Performance
White Paper This paper presents and evaluates two implementations of the TCP Server architecture: using dedicated network processors on a Symmetric Multiprocessor (SMP) server and using dedicated nodes on a cluster-based server built around a... [06 Dec 2007]
Characterizing the Performance of Overflow on Linux Beowulf Architectures
White Paper Different networking architectures, from inexpensive switched Fast Ethernet to high performance networks like Myrinet interconnect, are considered in the performance evaluation. In this... [03 Apr 2007]
CSILabs Helps Researchers Get "More Science Per Dollar" With Supercomputing Cluster Built on Intel Gigabit Adapters
White Paper The interconnect chosen for the 256-node cluster: the Intel PRO/1000 MT Dual Port Server Adapter. Driven by the need to achieve extremely high bandwidth at much less cost, CSILabs and JLab worked to build a... [25 Nov 2004]
Using Intel Hyper-Threading Technology to Achieve Computational Efficiency
White Paper This white paper describes Dell tests of Hyper-Threading Technology used in several cluster configurations, varying interconnect, and processor cache size, and provides results and recommendations. The effects of Intel... [02 Mar 2004]
Achieving Mainframe-Class Performance on Intel Servers Using InfiniBand Building Blocks
White Paper And now, with a new class of interconnect standard called InfiniBand, Oracle9i Real Application Clusters builds upon these economic benefits with a dramatic performance and scalability... [25 Feb 2004]
The AMD Athlon MP Processor
White Paper Professional technology) at the processor instruction level, DDR memory at the platform level, and now 0.13 micron process with copper interconnect at the process technology level. The differentiating features as well as... [25 Feb 2004]
The AMD Athlon XP Processor with 512KB L2 Cache
White Paper DDR memory and HyperTransport technology at the platform level, and 0.13-micron process with copper interconnect at the process technology level. The differentiating features as well as the real-world... [25 Feb 2004]
UPA Graphics
White Paper It also compares the UPA interconnect with other graphics bus technologies, and discusses how UPA helps to accelerate application performance. This paper describes the UPA... [25 Feb 2004]
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