assp
High-Volume Nano FPGAs: Going Where No FPGA Has Gone Before
White Paper Traditional ASIC and ASSP design technologies are limited by the time and cost required not only in the initial design, but also in upgrades and updates once a system is in use. Electronic devices have found their way... [01 May 2009]
Increase Flexibility in Layer 2 Switches by Integrating Ethernet ASSP Functions Into FPGAs
White Paper A Layer 2 Ethernet switch connects multiple Ethernet LAN segments. Because each port on the switch can be connected to a different LAN segment, this topology forms a larger Ethernet network. The switch stores the Media Access Controller... [08 Jul 2008]