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CMOS Optical Receiver Chipset for Gigabit Ethernet Applications
White Paper This paper describes a 1.25-Gb/s simplified CMOS optical receiver chipset for Gigabit Ethernet applications, consisting of a TransImpedance Amplifier (TIA) and a Clock and Data Recovery (CDR) circuit. [11 Sep 2008]
Multi-Pole Bandwidth Enhancement Technique for Transimpedance Amplifiers
White Paper To demonstrate the feasibility of the method, a CMOS transimpedance amplifier is implemented in 0.18mm BiCMOS technology. A new technique for bandwidth enhancement of amplifiers is developed. Adding... [11 Sep 2008]
Design and Analysis Methodology for a Bluetooth Sub-Micron CMOS PA
White Paper This paper presents the methodology to design a Power Amplifier in sub-micron CMOS technology, taking into account all the parasitic effects. The PA has been integrated in a double oxide 0.18 um RF... [09 Aug 2008]
Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters
White Paper The sample-and-hold amplifier in each channel of a time-interleaved analog-to-digital converter system has finite bandwidth, and these bandwidths may be mismatched. Due to the rapid evolution of CMOS... [11 Jul 2008]
Development of SOI Based MMICs for Wireless LAN Applications
White Paper The low noise amplifier, implemented in a commercially available 0.35 mm SOI MOSFET process, operates at upper U-NII band (5.725-5.825 GHz). Due to its improved RF performances over conventional CMOS... [06 Dec 2007]
Compact Modeling of Nonlinear Distortion in Analog Communication Circuits
White Paper The examples in this paper, a high-level model of a CMOS low-noise amplifier and an active lowpass filter, demonstrate that the generated models can be efficiently evaluated in high-level dataflow-type... [25 Feb 2004]
