lithography
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Integration of High-Performance Transistors, High-Density SRAMs, and 10-Level Copper Interconnects Into a 90 nm CMOS Technology
White Paper The key process features are 193 nm lithography with a Phase Shift Mask (PSM) and Optical Proximity Correction (OPC) that enables to fabricate a 40 nm-long gate and a sub-1 µm 2 SRAM cell, a unique transistor feature... [01 Mar 2008]
IBM to use DNA to shrink chip size
News By using DNA, chipmakers could phase out multi-billion fabrication facilities stocked with lithography systems, which cost tens of millions of dollars. Greg Wallraff, an IBM scientist and a lithography... [21 Feb 2008]
Design Methods for Attaining IBM System z9 Processor Cycle-Time Goals
White Paper In particular, although the processor-subsystem cycle-time improvement was driven primarily by the technology migration from CMOS 9S (130-nm lithography) for the prior IBM System z990 to CMOS 10S0 (90-nm... [26 May 2007]
Intel to expand chip-making in China?
News These controls have put limits on what equipment can be brought into the country from the US and currently extend to lithography equipment capable of producing features smaller than 180 nanometres, according to a list of... [14 Mar 2007]
IBM backs $100m supercomputer centre
News AMD and IBM, among others, are already part of an effort to build a lithography research centre in Albany. IBM, in conjunction with other companies, will help build a supercomputer centre at Rensselaer Polytechnic... [12 May 2006]
Photoresponsive Polymer Photonic Crystal Device for Detection of Chem/Bio Agents
White Paper The strategy is to develop a 2-D photonic crystal using interference lithography, and to tether a periodic array of photoresponsive nanogels to it. A photoresponsive polymer photonic crystal device is being developed for... [24 Feb 2005]
Application of Electron-Beam Direct-Writing Technology to System-LSI Manufacturing
White Paper EB (electron-beam) direct-writing lithography has not only been used for semiconductor research and development but has also been applied to small-volume fabrication of custom LSI (large-scale integration) chips. [09 Dec 2004]
Application of Electron-Beam Direct-Writing Technology to System-LSI Manufacturing
EB (electron-beam) direct-writing lithography has not only been used for semiconductor research and development but has also been applied to small-volume fabrication of custom LSI (large-scale integration) chips. [09 Dec 2004]
Intel outlines latest breakthroughs with silicon
News Bohr added that Intel will adapt 248- and 193-nanometer lithography tools to produce 65-nanometer chips. Lithography tools 'draw' transistors on wafers by shining light onto masks, maps of a chip's... [31 Aug 2004]
1X Lithography for a Micromachined Accelerometer
White Paper This paper examines the effectiveness of 1X stepper lithography in meeting Analog Devices requirements for the 30 lithography levels required to manufacture their integrated MEMS devices. This device... [30 Apr 2004]
High Optical Density Photomasks for Large Exposure Applications
White Paper Since the introduction of projection lithography in semiconductor manufacture, photomasks have been coated with 800 Å to 1000 Å of Cr film to achieve an OD of 3.0 ± 0.2 at g, h and i-line Mercury (Hg) wavelengths. [30 Apr 2004]
Imaging and Resist Technologies for the Micromachining Industry
White Paper The motivation for this work is the critical nature of lithography as a technology that enables the advancement of the micromachining industry. The two primary challenges to device pattern transfer are high aspect ratio... [30 Apr 2004]
Process Characterization of an Ultra-Thick Strippable Photoresist Using a Broadband Stepper
White Paper Extending the microlithographic processes into these rapidly growing areas is placing new demands on both the photosensitive materials and the lithography equipment. Lithographic applications that require photoresist... [30 Apr 2004]
A Low Cost Lithography Process for Flip-Chip Applications in Advanced Packaging Industry
White Paper This paper also shows that key lithography tool success factors are high throughput, high wafer plane illumination intensity, low cost reticle technology and a pattern recognition based alignment methodology. [25 Feb 2004]
The Printability of 1X Reticle Defects for Submicron Design Rules
White Paper Due to limitations of the lithography system and the design of the reticle containing programmed defects, additional conditions were investigated through the use of an optical lithography simulation... [25 Feb 2004]
