processors symmetric

Y-Junction Based Addressing in Optical Symmetric Multiprocessor Networks

White Paper In a Symmetric MultiProcessor (SMP), every processor has its own cache, and all the processors and memory modules are connected to the central interconnect, which is usually a shared bus. As the... [11 Sep 2008]

Y-Junction Based Addressing in Optical Symmetric Multiprocessor Networks

In a Symmetric MultiProcessor (SMP), every processor has its own cache, and all the processors and memory modules are connected to the central interconnect, which is usually a shared bus. As the... [11 Sep 2008]

Binomial Graph: A Scalable and Fault-Tolerant Logical Network Topology

White Paper BMG provides desirable topological properties in terms of both scalability and fault-tolerance for high performance computing such as reasonable degree, regular graph, low diameter, symmetric graph, low cost factor, low... [04 Aug 2008]

Memory and Network Bandwidth Aware Scheduling of Multiprogrammed Workloads on Clusters of SMPs

White Paper Symmetric Multiprocessors (SMPs), combined with modern interconnection technologies are commonly used to build cost-effective compute clusters. However, contention among processors for access to shared... [11 Jul 2008]

Load Balancing for Spatial-Grid-Based Parallel Numeric Simulations on Clusters of SMPs

White Paper Load distribution is an essential factor to parallel efficiency of numerical simulations that are based on spatial grids, especially on clusters of Symmetric MultiProcessors (SMPs). This paper presents a method of... [10 Jul 2008]

Load-Balancing for a Real-Time System Based on Asymmetric Multi-Processing

White Paper It allows retaining the flexibility and ease of development of a normal application for the real-time applications while keeping the whole power of SMP (Symmetric Multi-Processors) systems for their... [10 Jul 2008]

An Assessment of Leadership Performance With POWER6 Processors and Red Hat Enterprise Linux 5.1

White Paper The IBM System p 570 with POWER6 processors provides leadership performance and demonstrates excellent scalability moving from one node to four nodes in this environment while providing linear SMP... [09 Apr 2008]

TCP Servers: Offloading TCP Processing in Internet Servers - Design, Implementation, and Performance

White Paper This paper presents and evaluates two implementations of the TCP Server architecture: using dedicated network processors on a Symmetric Multiprocessor (SMP) server and using dedicated nodes on a... [06 Dec 2007]

Improving HPC Cluster Performance Through Communication Efficiency

White Paper Typically, a High-Performance Computing (HPC) cluster loosely couples multiple Symmetric Multiprocessing (SMP) platforms into a single processing complex. Each SMP server uses shared memory for its... [07 Nov 2007]

Developing Multithreaded Applications: A Platform Consistent Approach

White Paper The objective of the Multithreading Consistency paper is to provide guidelines for developing efficient multithreaded applications across Intel-based Symmetric Multiprocessors (SMP) and/or systems with Hyper-Threading... [07 Nov 2007]

Sun SPARC Enterprise Server Family Architecture Flexible, Mainframe-Class Compute Power

White Paper With Symmetric MultiProcessing (SMP) scalability from one to 64 processors, memory subsystems as large as 2 TB, and high-throughput I/O architectures, Sun SPARC Enterprise servers easily perform the... [11 May 2007]

An Asymmetric Model for Real-Time and Load Balancing on Linux SMP

White Paper The authors propose the ARTiS system, a real-time extension of GNU/Linux dedicated to SMP (Symmetric Multi-Processors) systems. The basic idea of ARTiS is to assign a selected set of... [03 Apr 2007]

Asymmetric Scheduling and Load Balancing for Real-Time on Linux SMP

White Paper The ARTiS system, a real-time extension of the GNU/Linux scheduler dedicated to SMP (Symmetric Multi-Processors) systems is proposed. ARTiS exploits the SMP architecture to guarantee the pre-emption of a... [03 Apr 2007]

Developing and Tuning Applications on UltraSPARC T1 Chip Multithreading Systems

White Paper Akin to symmetric multiprocessing on a chip, UltraSPARC T1 processors are designed so that applications that currently scale well on SMP machines are likely to scale well in UltraSPARC T1 processor-based... [07 Jun 2006]

Linux enlisted for mission-critical defence app

News To maximise real-time performance, it uses symmetric multi-processing, load-balancing and CPU shielding. Concurrent iHawk systems are powered by up to eight Intel Xeon or AMD Opteron processors and up to... [01 Dec 2005]

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