circuits
RSS circuitsDevelopment of a Single-Chip RF Front-End LSI for Wireless LAN With Transmission Line Based Matching Circuits
White Paper In order to reduce the chip size, on-chip CPW lines has been employed to realize on-chip impedance matching circuits which saves 30-40% chip area than those using the spiral inductors. In Direct Conversion Receiver (DCR)... [06 Dec 2007]
Modeling of Jitter in Bang-Bang Clock and Data Recovery Circuits
White Paper Clock and Data Recovery (CDR) circuits incorporating bang-bang (binary) Phase Detectors (PDs) have recently found wide usage. In contrast to their linear counterparts, bang-bang PDs relax the speed and precision required... [22 Oct 2008]
Jitter Tolerance Analysis of Clock and Data Recovery Circuits Using Matlab and VHDL-AMS
White Paper In the scope of the development of a complete top-down design flow targeting clock and data recovery circuits for high-speed data links, the paper presents two methods to analyze the jitter tolerance of such links, based... [22 Oct 2008]
Resource Sharing of High-Speed Optical Circuits for File Transfers
White Paper A number of efforts are underway to use optical networks to create high-speed end-to-end circuits. These circuits can be used for transfers of large files such as those generated by large-scale... [11 Sep 2008]
A Multiple-Rotating-Clock-Phase Architecture for Digital Data Recovery Circuits Using Verilog-A
White Paper This paper presents an oversampling Data Recovery (DR) architecture using Verilog-A that employs a novel Multiple-Rotating-Clock-Phase (MRCP) concept for its operation. The MRCP-DR architecture is a variant of the eye-tracking DR... [22 Oct 2008]
Verification of Bit-Error Rate in Bang-Bang Clock and Data Recovery Circuits
White Paper High speed serial data links are expected to transmit data at very high rates with very high fidelity. Today speeds approaching 10 Gb/s are becoming common with 40 Gb/s on the horizon. Typically, a maximum Bit-Error Rate (BER) of 10 -... [29 Aug 2009]
RIC-155GE Connects IP DSLAM Infrastructure Transparently Over Dedicated Leased SDH Circuits
White Paper Telefonica Deutschland is a German provider of integrated data and telecommunication solutions for business users. The company wanted to transport any Ethernet traffic transparently over conventional SDH lines. [03 Jul 2008]
LSI Chooses the Intel Xeon Processor 7300 Series to Help Engineers Speed New, More Complex Integrated Circuits to the Marketplace
White Paper As LSI engineers packed more functionality into chips and designs grew more complex, EDA processing was taking longer to complete. At the same time, LSI faced competitive pressures to keep new product turnaround as rapid as possible. [01 Jan 2009]
Analyzing Switched Circuits to Design DC-DC and DC-AC Converters
White Paper The purpose of this paper is to present an alternative analysis of switched circuit to design Square Wave Generators (SWG). A SWG may be designed by using low-cost electronic components, which allows to the readers to understand how... [11 Sep 2008]
MPLS-Based Layer 2 Virtual Private Networks
White Paper While Virtual Private Networks (VPNs) based on Frame Relay or ATM circuits are common, the costs of maintaining separate networks for Internet traffic and VPNs and the administrative burden of provisioning VPNs have led... [11 Sep 2008]
The virus that could spell the end of Intel
News Genetically modified viruses may one day help to build miniature circuits smaller than the wavelength of visible light. This means they can use them as microscopic construction workers to build circuits... [06 Feb 2002]
A Wide-Tracking Range Clock and Data Recovery Circuit
White Paper SCALING of CMOS technology has progressed relentlessly for the past several decades and brought unprecedented benefits to digital Integrated Circuits (ICs). In order for the improvements of individual ICs to benefit the... [29 Aug 2009]
Small Science: Discovering How Molecules Work
White Paper Scientists in the Quantum Science Research group use molecules in circuits to perform the types of computing and communications functions in existing integrated circuits. [14 Dec 2007]
Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors
White Paper Three-Dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. It explores the behavior of the 3D-integrated arithmetic circuits... [11 Jul 2008]
A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores Using Dynamic Hardware/Software Partitioning
White Paper Field Programmable Gate Arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Previously, this paper proposed warp processing, a technique capable of optimizing a software application by... [22 Oct 2008]
