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Energy Based Analysis of Embedded Microprocessor Cache Design

Overview This paper focuses on performing a broad exploration of the embedded processor cache design space in order to determine the energy consumption and performance characteristics of alternative cache designs. Using simulators and energy modeling frameworks, they seek to study different alternatives and identify the parameters critical for reducing energy consumption in caches. Based on the design space exploration, they identify cache size as the primary candidate for energy reduction. They explore different design alternatives that seek to reduce cache size without significantly affecting performance. They perform a re-analysis of a seminal work in low energy cache design which seeks to use reduction in cache size to curb energy consumption.

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Publisher
University of California
File Format
PDF
Date Published
Dec 4, 2008
Format
White Papers
Topics
Embedded Microprocessors, Microprocessors

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