White Papers

Direct Cache Access for High Bandwidth Network I/O

Overview Off late I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory latency alone can limit processors from matching 10 Gb inbound network I/O traffic. This paper proposes a platform-wide method called Direct Cache Access (DCA) to deliver inbound I/O data directly into processor caches. They demonstrate that DCA provides a significant reduction in memory latency and memory bandwidth for receive intensive network I/O applications. Analysis of benchmarks such as SPECWeb9, TPC-W and TPC-C shows that overall benefit depends on the relative volume of I/O to memory traffic as well as the spatial and temporal relationship between processor and I/O memory accesses.

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Publisher
Institute of Electrical and Electronics Engineers
File Format
PDF
Date Published
Sep 10, 2008
Format
White Papers
Topics
Interfaces - Buses - I-Os, Ethernet, Bandwidth Issues

Institute of Electrical and Electronics Engineers White Papers

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